ENET3xxx: : 2.5G - 10Gbps Access Flow Processor:
Features/Technology
- The first 10Gbps Fabric Packet Processor and Hierarchical Traffic Manager integrated onto a single ultra low cost FPGA
- Supports up to 4K flows, 4K policers, 4K shapers, 2K queues and 256 logical ports enable full Ethernet switching between all 256 logical ports including SMTP, RSTP
- Full compliance to TR-101, MEF standards including compliance with MEF 9 and MEF 14, 802.1ad, 802.1ah, 802.1ag, Y.1731, E-LAN, E-Line, including PBB-TE and T- MPLS together with full PBB implementing B and I Switch on a single device
- Deterministic 2.5G to 10Gbps throughput
- Integrated Packet Generator and analyzer
- Wire speed fragment frames switch including ATM to Ethernet interworking or other fragment frames interworking switching
- Enhance flexibility, configurability , and programmability including field upgradeability
- Best price/performance available in the industry
- Huge parameter search engine data base through a single or dual DDR2, supporting up 128,000 entries including 128,000 MAC address or IP for L2&L3 switching and routing, multicast, classification tables and 32 programmable search tables
- Hierarchical QoS including WFQ,WRR, WRED and strict priority supporting up to 2K queues
- Support up to 40 Fast Ethernet ports
- MEF 10 compliance policing per stream with 64Kbps granularity and up to 4K streams.
- Advanced hierarchical classification and filtering including configurable packet parsing and configurable search keys
- Programmable Packet Editor supporting per flow multiple actions of Append/ Swap/ Extract/ stamp in any preconfigured location in the first 128 bytes
- Management is performed through , generic Motorola CPU interface, MII,GMII or integrated CPU
System Block

ENET3xxx Interface options












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